I/O Architecture (System-Level View)

 

🔷 Basic Idea

A computer system integrates CPU, memory, and I/O devices using a hierarchical bus architecture designed to balance:

• ⚡ Performance

• 💰 Cost

• 📏 Physical constraints (signal distance, wiring)

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🔷 Hierarchical Structure

1. CPU ↔ Main Memory (Memory Bus)

• Fastest connection

• Usually short, high-speed, proprietary

• Directly supports instruction execution

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2. General I/O Bus (e.g., PCI)

• Connects high-performance devices

• Example:

  • Graphics cards

  • Network cards

📌 Example standard:

• PCI

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3. Peripheral Bus (Slower Buses)

• Connects low-speed devices

• Supports many devices simultaneously

📌 Examples:

• USB

• SATA

• SCSI

Devices:

• Disks

• Keyboards

• Mice

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🔷 Why Hierarchy Exists

1. Physics Constraints

• Faster buses require:

  • Shorter distances

  • Less electrical noise

• Cannot attach many devices to high-speed buses

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2. Cost Considerations

• High-speed buses are:

  • Expensive to design

  • Expensive to manufacture

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3. Scalability

• Slower buses allow:

  • Many devices

  • Flexible expansion

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🔷 Key Insights 

👉 The architecture is a trade-off design:

• Place latency-sensitive devices near CPU

• Place throughput-tolerant devices farther away